SiC 碳化矽 - 台定國際有限公司

晶錠

4H N-type Silicon Carbide Substrate Specification
Diameter	100 +0.0 /-0.5 mm	150 +0.0/-0.5 mm
Surface Orientation	Off-axis 4.0° toward <1120>± 0.5°	Off-axis 4.0 toward <1120>± 0.5°
Primary Flat Orientation	<1100>±5.0°	<1100>±5.0°
Primary Flat Length	32.5 mm±2.0 mm	47.5 mm 2.0 mm
Secondary Flat Orientation	90.0° CW from Primary Flat ±5.0°, Silicon Face Un
Secondary Flat Length	18.0 mm ±2.0 mm
Wafer Edge	Chamfer	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤1 micropipes/cm²
Polytype areas by high-intensity light	None permitted	None permitted
Resistivity	0.015Ω.cm 0.028Ω.cm	0.015Ω.cm 0.028Ω.cm
Thickness	350 μm ± 25.0 μm	350 μm ± 25.0 μm
TTV	≤10 μm	≤15 μm
BOW (ablolute value)	≤25 μm	≤40 μm
WARP	≤40 μm	≤50 μm
Surface finish	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm
Surface Roughness	CMP Si Face Ra ≤0.5 nm	CMP Si Face Ra ≤0.5 nm
Cracks by high-intensity light	None Permitted	None Permitted
Edge Chip /indents by diffuse lighting	None Permitted	None Permitted
Total usable area	≥90%	≥90%

晶圓-導電型

4H N-type Silicon Carbide Substrate Specification
Diameter	100 +0.0 /-0.5 mm	150 +0.0/-0.5 mm
Surface Orientation	Off-axis 4.0° toward <1120>± 0.5°	Off-axis 4.0 toward <1120>± 0.5°
Primary Flat Orientation	<1100>±5.0°	<1100>±5.0°
Primary Flat Length	32.5 mm±2.0 mm	47.5 mm 2.0 mm
Secondary Flat Orientation	90.0° CW from Primary Flat ±5.0°, Silicon Face Un
Secondary Flat Length	18.0 mm ±2.0 mm
Wafer Edge	Chamfer	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤1 micropipes/cm²
Polytype areas by high-intensity light	None permitted	None permitted
Resistivity	0.015Ω.cm 0.028Ω.cm	0.015Ω.cm 0.028Ω.cm
Thickness	350 μm ± 25.0 μm	350 μm ± 25.0 μm
TTV	≤10 μm	≤15 μm
BOW (ablolute value)	≤25 μm	≤40 μm
WARP	≤40 μm	≤50 μm
Surface finish	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm
Surface Roughness	CMP Si Face Ra ≤0.5 nm	CMP Si Face Ra ≤0.5 nm
Cracks by high-intensity light	None Permitted	None Permitted
Edge Chip /indents by diffuse lighting	None Permitted	None Permitted
Total usable area	≥90%	≥90%

晶圓-半絕緣型

Semi-Insulating Silicon Carbide Substrate Specification
	4 inch	6 inch
Diameter	100 +0.0/-0.5 mm	150 +0.0/-0.5 mm
poly type	4H	4H
Surface Orientation	On-axis <0001>± 0.5º	On-axis <0001>± 0.5º
Primary Flat Orientation	<1100>±5.0º	<1100>±5.0º
Primary Flat Length	32.5 mm±2.0 mm	1.0mm ± 0.25mm (Notch Depth)
Secondary Flat Orientation	90.0º CW from Primary Flat ±5.0º, Silicon Face Up	⎼
Secondary Flat Length	18.0 mm±2.0 mm	⎼
Micropipe Density	≦1 micropipes/cm²	≦1 micropipes/cm²
Resistivity	≥1E7Ω.cm	≥1E7Ω.cm
Thickness	500 μm ± 25.0 μm	500 μm ± 25.0 μm
TTV	≤10 μm	≤15 μm
BOW	≤25 μm	≤40 μm
WARP	≤40 μm	≤50 μm
Edge	Chamfer	Chamfer
Surface finish	Si Face CMP ≦1 nm	Si Face CMP ≦1 nm
Surface Roughness	CMP Si Face Ra ≦0.5 nm	CMP Si Face Ra ≦0.5 nm
Polytype areas	None	None
chips/indents/cracks/stains/contamination	None	None
Packing	Epi-ready with vacuum packaging	Epi-ready with vacuum packaging

晶種

4H N-type Silicon Carbide Substrate Specification
Diameter	100 +0.0 /-0.5 mm	150 +0.0/-0.5 mm
Surface Orientation	Off-axis 4.0° toward <1120>± 0.5°	Off-axis 4.0 toward <1120>± 0.5°
Primary Flat Orientation	<1100>±5.0°	<1100>±5.0°
Primary Flat Length	32.5 mm±2.0 mm	47.5 mm 2.0 mm
Secondary Flat Orientation	90.0° CW from Primary Flat ±5.0°, Silicon Face Un
Secondary Flat Length	18.0 mm ±2.0 mm
Wafer Edge	Chamfer	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤1 micropipes/cm²
Polytype areas by high-intensity light	None permitted	None permitted
Resistivity	0.015Ω.cm 0.028Ω.cm	0.015Ω.cm 0.028Ω.cm
Thickness	350 μm ± 25.0 μm	350 μm ± 25.0 μm
TTV	≤10 μm	≤15 μm
BOW (ablolute value)	≤25 μm	≤40 μm
WARP	≤40 μm	≤50 μm
Surface finish	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm
Surface Roughness	CMP Si Face Ra ≤0.5 nm	CMP Si Face Ra ≤0.5 nm
Cracks by high-intensity light	None Permitted	None Permitted
Edge Chip /indents by diffuse lighting	None Permitted	None Permitted
Total usable area	≥90%	≥90%

加工基板 / 客製化厚度及形狀

4H N-type Silicon Carbide Substrate Specification
Diameter	100 +0.0 /-0.5 mm	150 +0.0/-0.5 mm
Surface Orientation	Off-axis 4.0° toward <1120>± 0.5°	Off-axis 4.0 toward <1120>± 0.5°
Primary Flat Orientation	<1100>±5.0°	<1100>±5.0°
Primary Flat Length	32.5 mm±2.0 mm	47.5 mm 2.0 mm
Secondary Flat Orientation	90.0° CW from Primary Flat ±5.0°, Silicon Face Un
Secondary Flat Length	18.0 mm ±2.0 mm
Wafer Edge	Chamfer	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤1 micropipes/cm²
Polytype areas by high-intensity light	None permitted	None permitted
Resistivity	0.015Ω.cm 0.028Ω.cm	0.015Ω.cm 0.028Ω.cm
Thickness	350 μm ± 25.0 μm	350 μm ± 25.0 μm
TTV	≤10 μm	≤15 μm
BOW (ablolute value)	≤25 μm	≤40 μm
WARP	≤40 μm	≤50 μm
Surface finish	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm	Double Side Polish, Si Face CMP (Chemical Polishing) ≤1 nm
Surface Roughness	CMP Si Face Ra ≤0.5 nm	CMP Si Face Ra ≤0.5 nm
Cracks by high-intensity light	None Permitted	None Permitted
Edge Chip /indents by diffuse lighting	None Permitted	None Permitted
Total usable area	≥90%	≥90%

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